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Bergeron, Janick.

Writing testbenches : functional verification of HDL models / by Janick Bergeron. - 2nd ed. - Boston, [Mass.] ; London : Kluwer Academic, [2003?] - xxx, 475 p. : ill. ; 25 cm.

CW508

What is Verification? -- Verification tools -- The verification plan -- High level modeling -- Stimulus and response -- Architects testbenches -- Simulation management

ISBN: 9781402074011 : £68.00 1402074018

LCCN: 2003041995

Subjects--Topical Terms:
Computer hardware description languages.
Integrated circuits--Verification
Programming & scripting languages: general
Systems analysis & design
Computer science
Computer hardware
Computer-aided design (CAD)
Electrical engineering
Electronics: circuits & components

Dewey Class. No.: 621.392