SystemVerilog for verification : a guide to learning the testbench language features / Chris Spear, Greg Tumbush.
Material type:![Text](/opac-tmpl/lib/famfamfam/BK.png)
- 9781461407140
- 1461407141 (alk. paper)
- 9781461407140 (alk. paper)
- System Verilog for verification
- 621.392
- .S67 2012
Item type | Current library | Call number | Status | Date due | Barcode |
---|---|---|---|---|---|
General Lending | Carlow Campus Library General Lending | 621.392 (Browse shelf(Opens below)) | Checked out | 27/08/2020 | 81075 |
General Lending | Carlow Campus Library General Lending | 621.392 (Browse shelf(Opens below)) | Available | 81076 |
CW558
CW527
Includes bibliographical references (p. 455) and index.
Verification Guidelines -- Data Types -- Procedural Statements and Routines -- Connecting the Testbench and Design -- Basic OOP -- Randomization -- Threads and Interprocess Communication -- Advanced OOP and Testbench Guidelines -- Functional Coverage -- Advanced Interfaces -- A Complete SystemVerilog Testbench -- Interfacing with C/C++.
58.52